cables/digital-interface-audio · v1.0

Digital Cables & Audio Quality

Every interface delivers correct bits, but each opens a different set of noise paths — and each one’s jitter caps the SNR a DAC can reach. Here is the mechanism, interface by interface.

PICHITCHAI OPADWORARAT · MUSIC ENTHUSIASTSIGNAL PATH: SOURCE → INTERFACE → DACS/PDIF · AES/EBU · TOSLINK · USB

Digital audio interface: protocol and transport

Before understanding how noise enters, you must understand how each interface transports data and what isolation/buffering it has — because that sets which noise paths are open.

S/PDIF biphase mark encoding (BMC)
A transition at the start of every bit period + a mid-period transition if bit = 1 no mid-period transition if bit = 0
self-clocked: the clock is embedded in the data stream · the DAC must PLL-lock onto it directly — no buffer, no retransmit → jitter on the signal = jitter on the recovered clock
InterfaceMediumIsolationJitter to DAC?
S/PDIF coax75 Ω, 0.5–1 Vnonedirect (self-clocked)
AES/EBU110 Ω XLR, 3–10 Vtransformerreduced by transformer
TOSLINKoptical (PMMA)full galvanicvia pulse quality
USBD+/D−, VBUS 5 Vnone (shared VBUS)async breaks it
Ethernetpacket + bufferbuffer before DACtiming never reaches DAC

S/PDIF is self-clocked with no buffer or retransmit; Ethernet has a packet buffer in the streamer before the DAC, so network jitter never reaches the DAC — but the cable still carries HF noise via conducted/radiated paths into ground.

Common-mode noise and conducted EMI

A twisted pair sends differential — noise equal on both wires is subtracted out (CMRR) — but in the real world CMRR falls with frequency because the two wires’ capacitances aren’t perfectly equal (asymmetry).

Common-mode rejection ratio (CMRR)
CMRR (dB) = 20 · log₁₀( Adiff / Acm )
CMRR = 60 dB → common-mode cut 1,000× · but it falls with frequency — at 100 MHz it may be only 20–30 dB
Mode conversion from cable asymmetry
Vdm = Vcm · (ΔC / 2C) · jωRs
ΔC = difference in capacitance-to-ground between the two wires · the higher ω, the more mode conversion (common-mode leaks into differential)
SMPS
switching 50k–500kHz
Common-mode
along shield/ground
Chassis
into PCB ground
DAC
noise floor rises

An SMPS in a switch or device produces common-mode noise at its switching frequency (50k–500 kHz) plus harmonics into the MHz, flowing off the cable as common-mode current along the shield/ground into the chassis.

Ground loops and shield topology

Two connected devices usually sit at slightly different ground potentials (different SMPS, different outlets). Even 10–100 mV drives current through the conductor joining them.

Ground loop current
Iloop = ΔVgnd / Zloop
ΔV = 50 mV, Zloop = 2 Ω → Iloop = 25 mA enters the PCB ground plane → modulates the DAC supply rail
TopologyGround loopFix
S/PDIF coaxshield = signal returnhard to break; use transformer/CMC
STP/S-FTP both endsautomatic loopshield one end only
TOSLINKno conductor

RF radiation and capacitive coupling

Unshielded UTP has an electric length near λ/4 of its operating frequencies at practical lengths → an efficient dipole antenna.

Quarter-wave resonance
λ/4 (m) = c / (4 · f · √εr)
f = 125 MHz, εr ≈ 2.3 (PE) → λ/4 ≈ 0.5 m — close to a typical patch-cord length
Capacitive coupling current into the chassis
Icouple = Cstray · dV/dt = Cstray · V · 2πf
Cstray = 10 pF, V = 1 V, f = 100 MHz → Icouple ≈ 6.3 mA — enough to modulate the ground plane

RF rectification in the op-amp and DAC analog stage

When RF reaches an op-amp input pin, the ESD diode (nonlinear I–V) rectifies it into a DC offset, because the positive and negative half-cycles don’t conduct symmetrically.

RF-induced DC offset (Shockley diode model)
IDC ≈ Is · ( VRF² / 2VT² )
VT ≈ 26 mV @25°C · the DC offset is amplified by the op-amp gain → output error · ref: ADI MT-096
Power supply rejection ratio (PSRR)
PSRR (dB) = 20 · log₁₀( ΔVsupply / ΔVoutput )
a typical DAC has PSRR ≈ 80–100 dB @1 kHz · falling to 20–40 dB @1 MHz · at 100 MHz only 10–20 dB → reaches the analog output measurably

DC offset → shifted bias point → more even-order harmonic distortion (2nd, 4th), which the ear reads as “warm” — but it is measurable distortion.

TOSLINK breaks every electrical path completely — no common-mode, no ground loop, no conducted EMI passes. Only photons pass. But the jitter path stays open through optical pulse quality.

Jitter from rise time (deterministic jitter)
tj = Vnoise · tr / ΔVswing
photodiode + comparator: if rise time (tr) is slow (rounded pulse) + noise is high → the threshold crossing shifts each cycle → more jitter
Modal dispersion (pulse broadening)
Δtmodal = L · NA² / (2 · ncore · c)
PMMA fiber is multimode — each mode takes a different path → arrives at a different time → the pulse broadens with length L
Optical extinction ratio (ER)
ER (dB) = 10 · log₁₀( PHIGH / PLOW )
good parts ER > 10 dB, cheap ones ER ≈ 3–6 dB · low ER → constant background photocurrent → lower SNR → more jitter
1 ps10 ps100 ps

Fig 1. The SNR ceiling set by jitter (SNR = −20·log₁₀(2π·f·tⱼ)) — jitter limits SNR harder at high frequency. At 20 kHz, 1 ps gives a ~138 dB ceiling but 100 ps drops to ~98 dB. This is why clock/pulse quality matters (ref ADI MT-007)

Why some TOSLINK systems sound identical

A DAC with a good ASRC or reclocking buffer (e.g. ESS Sabre ES9038) filters out nearly all jitter → optical-cable differences shrink to near zero here — jitter is removed at the sink.

USB audio: isochronous, VBUS noise and ground path

USB audio uses isochronous transfer (reserved bandwidth each frame), low latency but no error correction — a lost packet is lost.

VBUS mechanism

VBUS (5 V from the host) runs on the same cable as D+/D−. Computer power usually carries SMPS switching noise from the motherboard at 50–200 mV pp → if the DAC uses VBUS as supply/reference → noise enters the analog stage directly.

Mode / pointBehaviourEffect
isochronousreserved BW, no retransmitlow latency, packets can drop
VBUS 5 Vshares cable with datadirect noise path
shield/drainGND tied both endsground loop
async + isolatorDAC clocks itself + ADuM4160cuts VBUS + loop

Best fix: a galvanic USB isolator (e.g. ADuM4160) or a powered hub with a separate linear PSU — cutting VBUS noise and the ground loop.

AES/EBU: balanced differential and transformer coupling

AES/EBU runs on a 110 Ω balanced line (XLR) with a 3–10 V swing, far above S/PDIF coax (~0.5–1 V) → better SNR from the start, and almost all professional gear has an input transformer.

Balanced line noise rejection
Vnoise,out = Vnoise,cm / CMRR
AES/EBU receiver CMRR ≈ 40–60 dB @10 kHz + transformer isolation another 80–120 dB → total common-mode cut 120–180 dB vs unbalanced S/PDIF
S/PDIF coax (unbalanced)AES/EBU (balanced + transformer)

Fig 2. Common-mode rejection by interface — AES/EBU (CMRR + transformer) rejects common-mode by hundreds of dB more than S/PDIF coax across the audio–MHz band. This is the quantitative reason AES/EBU is the most noise-resistant electrical interface

The transformer gives three things at once: galvanic isolation (cuts DC + ground loop), very high common-mode rejection, and impedance matching — making AES/EBU ideal for professional use that demands consistency in every environment.

Comparison of all interfaces

InterfaceGalvanic isolationCommon-mode rejectionJitter to DACDominant noise path
S/PDIF coaxnonelow (unbalanced)directshared ground/shield
AES/EBUtransformerhighest (120–180 dB)reduced by transformerlowest of the electrical set
TOSLINKcompleteN/A (no conductor)pulse qualityoptical jitter
USBnone (VBUS)moderateasync breaks itVBUS + ground loop
Ethernetbuffercable-dependentnever reachesRF radiated/conducted

There is no absolute “best” interface — each opens a different set of noise paths. Choose by which path your system is sensitive to.

Fixes and mitigation

Common-mode choke impedance
Zcm = jωLcm (high at HF) Zdm ≈ 0 (differential passes)
Lcm = 100 μH – 10 mH · at 100 MHz, Lcm = 1 mH: Zcm ≈ 628 kΩ → blocks common-mode current effectively
Path / problemFixEffect
common-mode on cablecommon-mode choke (CMC)reduces conducted noise
VBUS + ground loop (USB)USB isolator (ADuM4160)cuts electrical fully
jitter (S/PDIF self-clocked)reclocker (Si5324) / ASRC (SRC4392)re-timestamps with a clean clock
switching noise at sourcelinear regulated PSUfixes the source
all conductedconvert to optical fibercuts ground loop + conducted
Selection principle

Match the fix to the noise path the interface actually opens: USB → isolator, S/PDIF → reclocker/transformer, everything → linear PSU at the source. Every step has a clear, measurable mechanism.

References

  • stdAES3-2009, AES standard — Serial transmission format for two-channel digital audio.
  • stdIEC 60958-1, Digital audio interface — Part 1: General.
  • stdUSB-IF, USB Audio Class 2.0 Specification.
  • appAnalog Devices “MT-096: RFI Rectification Concepts.”
  • appAnalog Devices “MT-007: Aperture Time, Aperture Jitter, Aperture Delay Time” (W. Kester).
  • appMicrochip “AN1767: EMIRR Characterization for Op Amps.”
  • appAbracon “Common Mode Chokes: Basics and Applications.”
  • ieeeIEEE “Susceptibility of Operational Amplifiers to Conducted EMI Injected Through the Ground Plane…,” 2016.
  • ieeeArchambeault, B. et al. “Impact of analog/digital ground design on circuit functionality and radiated EMI,” IEEE Trans. EMC.
Edited by Pichitchai Opadworarat Head of R&D — Pyramid Lifestyle Technology Ltd. Part. 2 years in audio engineering (since the company was founded)

Revision history

v1.02026-06-11Migration + jitter/isolation charts